Pocket wafers + test chips for ALD: faster conformality learning, lower risk

Atomic layer deposition (ALD) lives or dies by conformality and surface chemistry. Pocket wafers loaded with discrete ALD test chips let you characterize both – quickly – on real 200/300 mm tools without burning product wafers.

TL;DR

A pocket wafer is a carrier wafer with machined/etched pockets that can hold separate test chips (coupons). For ALD, those chips can be purpose‑built conformality vehicles (e.g., PillarHall® LHAR structures). You run them through your production ALD tool, then measure penetration depth, step coverage, and even extract sticking probabilities or elemental composition– all with much faster design‑of‑experiments (DoE) turns than using product wafers.

What makes this ALD‑specific?

The chips: lateral high‑aspect‑ratio (LHAR) ALD vehicles

A common choice is PillarHall® LHAR chips: silicon coupons (~15 × 15 mm) containing lateral channels (100–500 nm tall) that reach AR ≈ 10 000:1. After ALD, you remove the membrane and map film thickness along the channel to quantify conformality (penetration depth, thickness profile) without wafer cross‑sectioning. LHAR chips come with handling/analysis guides and standardized procedures.

Why it matters: the shape of the thickness profile encodes ALD kinetics. In fact, the slope of the “leading front” inside a HAR feature can be used to extract sticking probabilities for precursor and co‑reactant (e.g., TMA/H₂O in Al₂O₃ ALD), delivering quantitative kinetic data from a single run..

The carrier: a pocket wafer your tools already accept

Chipmetrics offers 150/200/300 mm pocket wafers with cavities sized for these chips (typically 9 pockets per wafer for 300 mm), so you can place multiple LHAR chips in one run and even map center‑to‑edge behavior.

Adapter‑style pocket carriers also let you process smaller wafers or coupons on larger‑format tools (e.g., 150 mm pieces on 200/300 mm equipment), which is useful for early precursor screening on the production toolset.

What you can learn fast with ALD pocket‑wafer runs

1. Conformality & penetration depth
   • Map thickness along LHAR channels to quantify where deposition stalls and how much extra dose/purge is required to reach uniformity at target AR. Standard procedures support single‑chip and multi‑chip (wafer‑scale) monitoring.
2. Dose–purge window and cycle design
   • By applying half‑reaction doses and purges across chips on the same pocket wafer, you can quickly locate saturation windows and identify transport‑ vs reaction‑limited regimes. The ALD conformality literature gives the modeling framework (Knudsen transport, exposure, sticking).
3. Temperature and chemistry splits
   • Compare thermal vs plasma co‑reactants (H₂O vs O₃ vs O₂/NH₃ plasma) or substrate pretreatments across coupons to see how nucleation delays and recombination limit conformality. The LHAR concept was designed to make such comparisons reproducible.
4. Metrology options that don’t slow the line
   • Imaging ellipsometry and other optical methods can read thickness profiles along the LHAR trench, reducing the need for cross‑sections.

How it runs in practice

1. Lay out the pocket wafer
   • Use a 200/300 mm pocket carrier with nine cavities; load 5–9 LHAR chips for center‑to‑edge mapping in one deposition. Keep chip placement consistent; conformality can vary across the wafer.
2. Bond  chips
   • Optionally chips can be bonded in pockets using by use of cleanroom‑approved bonding materials. It is essential to avoid adhesives that outgas or contaminate your chamber. University and fab guides detail carrier selection and bonding options.
3. Run standard ALD splits
   • Examples: (a) Dose ladder for precursor/co‑reactant with fixed purge; (b) Purge ladder at fixed doses; (c) Temperature sweep at fixed cycle; (d) Chemistry swap (H₂O→O₃). Analyze profiles to extract penetration depth metrics (e.g., x₅₀/x₉₀) and, when applicable, sticking probabilities.
4. Read out & model
   • Convert the measured profile into kinetic parameters with the diffusion‑reaction models common in the ALD community (Knudsen diffusion + Langmuir‑type kinetics).

Compared to experimenting on production wafers

Production wafers give you WAT/PCM electrical monitors in the scribe lines at end‑of‑line – and those data remain the gold standard for line health and release – but they seldom tell you why an ALD film missed conformality inside a HAR feature. Running ALD DoEs directly on product wafers slows learning and risks yield.

Side‑by‑side

Dimension	Pocket wafer + ALD test chips	Production‑wafer testing
Time‑to‑data	Rapid DoEs; multiple chips per run for center‑edge mapping.	Tied to product flow, reticles, and EOL insertions.
ALD‑specific insight	Direct conformality profiles and sticking probabilities from LHAR structures.	Scribe‑line PCM/WAT shows param shifts, not HAR conformality.
Risk to WIP	Low – sacrificial chips on a carrier.	Medium–high – consumes product wafers & line time.
Representativeness	Requires correlation (pattern density, thermal path via carrier, edge behavior).	Perfectly representative of actual layout and stack.
Cross‑platform flexibility	Adapter carriers run smaller substrates on big tools – useful for early precursor screening.	Bound to product wafer size; fewer low‑risk screening options.

ALD‑focused DoEs you can run tomorrow

1. Saturation window mapping (Al₂O₃/TMA–H₂O example)
   • Keep cycles constant (e.g., 200). Sweep TMA dose from under‑ to over‑saturation; repeat for H₂O. Plot penetration depth vs dose and extract sticking for both half‑reactions. Look for the soft‑saturation behavior of H₂O at lower T as a red flag for conformality loss.
2. Ozone vs water co‑reactant
   • At fixed T, compare H₂O vs O₃. Expect different penetration‑depth trends from altered surface reactivity; use the conformality review’s exposure/sticking framework to interpret.
3. Plasma vs thermal ALD
   • For O‑ or N‑containing films, split thermal vs remote‑plasma recipes. LHAR profiles will reveal recombination effects and whether plasma creates a bottleneck deeper in the cavity.
4. Substrate sensitivity
   • Mount chips pre‑treated with different surface terminations (e.g., –OH‑rich, SAMs) to gauge nucleation delay and its impact on conformality across HAR features, guided by the conformality modeling literature.
5. Wafer‑scale uniformity
   • Load 5–9 chips on one 300 mm pocket wafer (center→edge). Compare LHAR profiles to see chamber‑level nonuniformity that traditional film‑on‑planar monitors might miss.

Practical gotchas (and mitigations)

• Bonding & contamination: Temporary adhesives and tapes can outgas. Use methods sanctioned for your tool class, track carrier history, and clean carriers between runs.
• Thermal path & chucking: Carrier material and pocket depth affect backside‑He cooling and temperature; choose carriers intended for your process window (glass/silicon options exist, with vacuum‑chucking features).
• Correlation to product: After you optimize with pocket‑wafer data, close the loop by checking a subset of PCM/WAT sites (or dedicated product monitors) to tie conformality improvements to electrical impact.

Implementation blueprint (ALD)

1. Pick the chips: LHAR4/LHAR5 for conformality; pick gap height (100 or 500 nm) and AR coverage up to 50 000:1.
2. Pick the carrier: 200/300 mm pocket wafer with 9 pockets sized for 15 × 15 mm chips; label sites so each chip maps to a die‑like position.
3. Define standard DoEs: dose/purge ladders, temperature sweeps, chemistry comparisons; plan metrology (imaging ellipsometry, reflectometry, spot‑by‑spot thickness mapping).
4. Automate analysis: Convert thickness‑vs‑distance profiles to PD50/PD90 and, when applicable, sticking via the diffusion‑reaction models summarized in the conformality review.
5. Institutionalize correlation: For each film and node, maintain a short playbook linking pocket‑wafer metrics to the product’s WAT or inline param shifts.

Bottom line

For ALD, pocket wafers + LHAR test chips give you the shortest, safest path to the two things that matter most: conformality and kinetics. You can quantify penetration depth and even sticking probabilities on your actual 200/300 mm equipment, run dense DoEs, and keep product lots out of harm’s way. Treat pocket‑wafer data as your fast‑learning loop, and use product‑wafer WAT/PCM as your correlation and release gate.

Further reading & typical specs

• Pocket wafer datasheet (300/200/150 mm; 15 × 15 mm pockets, 9 per wafer) – Chipmetrics.
• LHAR standard procedure (single‑chip vs multi‑chip on carriers; wafer‑scale monitoring) – Chipmetrics AN‑02. Chipmetrics
• LHAR5 features (100/500 nm gaps; AR up to 10 000:1) – Chipmetrics. Chipmetrics
• Sticking‑probability extraction from HAR profiles (TMA/H₂O/Al₂O₃) – JVST A 2019. Pure
• Conformality review & modeling framework – Applied Physics Reviews 2019. AIP Publishing
• Imaging ellipsometry for LHAR profiles –Atomic Limits. atomiclimits.com
• Adapter carriers (smaller wafers on larger tools) – Plan Optik. PLANOPTIK AG
• Bonding to carriers: contamination cautions – Stanford Nanofab guide. snfguide.stanford.edu
• PCM/WAT in scribe lines (why you still need it) – academic & industry overviews. iue.tuwien.ac.at+1